Phased Array Sonar

 

Client
Phased Array Sonar

The client had a slow scan phased array sonar and wanted a fast update phased array sonar. I developed an algorithm for processing all the echo ray lines of the sonar image in parallel and then implemented that algorithm in a large field programmable gate array (FPGA). This project followed the classic steps:

  • Phased array sonar algorithm development in Mathcad
  • Analog circuit design and SPICE simulation of the ultrasonic transmitters and receivers
  • Digital circuit design of  a 32-bit microcontroller board
  • FPGA implementation of the algorithm in Verilog

Two associates mentioned on the “About Us” page partnered on this project:

  • Squires Engineering (Firmware for the 32-bit microcontroller)
  • Advanced Design Services (Printed circuit board layout)